Documentation of slow_fir_filter release
This document contains technical documentation for the
slow_fir_filter FPGA module.
It is generated from release
slow_fir_filter-3.0.1+fa5f281d at 2023-02-28 07:21.
MAJORwill be incremented for incompatible API or functionality changes.
MINORwill be incremented when new functionality is added in a backwards compatible manner.
PATCHwill be incremented for backwards compatible bug fixes.
HASH field is the Git SHA that the release was made from.
It is included in the version number for internal traceability.
Release history and changelog follows below.
3.0.1+fa5f281d - (28 february 2023)
Update documentation with note on handshake rules.
3.0.0+fd52a59f - (17 september 2020)
Make coefficient set selectable per channel.
2.0.0+3c9f30b2 - (16 september 2020)
Add support for multiple coefficient sets.
1.0.1+ba513de5 - (28 august 2020)
1.0.0+9c074c1e - (21 august 2020)
See the Module slow_fir_filter page for an overview and specification of the
Here you will also find a technical description of the different sub-modules.
This module has the following dependencies:
The open-source hdl_modules project version
The Truestream module
This module’s source files shall be compiled to a VHDL library symbolically named